1. Introduction
The following description relates generally to an image data processing apparatus having a reduced size and an improved processing speed, and, for example, to an image data processing apparatus that performs processing by comparing the data of neighboring pixels at the time of encoding and decoding the image data, thereby reducing the size of a storage unit for storing image date and improving data processing speed.
2. Description of the Related Art
In general, a display device is a device for displaying captured images to the outside using a display panel. Such a display device requires an image processing apparatus for temporarily storing digital image date, converting the digital image data into analog data, and outputting the analog data, so as to display the digital image data.
Recently, with the increase in the use of display devices, the sizes of display devices become smaller and the processing speeds thereof become faster. In order to meet these trends, research into the implementation of an image data processing apparatus having a reduced size and improved processing speed has been widely conducted.
A prior art image data processing apparatus will be described below with reference to the accompanying drawings.
FIG. 1 is a block diagram showing the prior image processing apparatus, and FIG. 2 is a block diagram showing the memory of the prior art image data processing apparatus.
As shown in FIG. 1, the prior art image data processing apparatus includes an encoder 100 for compressing RGB data, memory 110 for storing the data compressed by the encoder 100, and a read decoder 140 and a scan decoder 120 for decoding and outputting the data stored in the memory 110.
The encoder 100 temporarily stores first RGB data in an internal buffer. When second RGB data is applied, the encoder 100 compares upper 4 bits of the first RGB data with respective upper 4 bits of the second RGB data. If the upper 4 bits of the first RGB data are identical to the upper 4 bits of the second RGB data, the upper 4 bits of the second RGB data are stored in RGB registers Base_R, Base_G and Base_B, as shown in FIG. 2.
Respective lower 2 bits of the first RGB data are stored in first registers O_R, O_G and O_B, respective lower 2 bits of the second RGB data are stored in second registers E_R, E_G, and E_B, and ‘11’ is stored as flag bits.
If the upper 4 bits of the first RGB data are not identical to the upper 4 bits of the second RGB data, the respective upper 4 bits of the first RGB data are stored in the first and second registers O_R, O_G, O_B, E_R, E_G and E_B, and the respective upper 4 bits of the second RGB data are stored in the RGB registers Base_R, Base_G and Base_B. In this case, the respective lower 2 bits of the first and second RGB data are not stored, and ‘00’ is stored as flag bits.
Furthermore, third RGB data and fourth RGB data, which are successively applied after the first RGB data and the second RGB data, are stored in the respective registers using the same method through the comparison of the data with the stored first and second RGB data, and ‘01’ or ‘10’ is stored as flag bits.
The restoration by the scan decoder 120 is performed by checking the flag bits, creating the upper 4 bits and lower 2 bits of the first and second RGB data using the data stored in the RGB registers Base_R, Base_G and Base_B and the first and second registers O_R, O_G, O_B, E_R, E_G and E_B, based on the flag bits, and restoring and outputting the compressed RGB data.
That is, if the flag bit is ‘11’, the scan decoder 120 creates the upper 4 bits of the first and second RGB data using the data stored in the RGB registers Base_R, Base_G and Base_B, the lower 2 bits of the first RGB data using the data stored in the first registers O_R, O_G and O_B, and the lower 2 bits of the second RGB data using the data stored in the second registers E_R, E_G and E_B.
If the flag bit is ‘01’, the scan decoder 120 creates the upper 4 bits of the third RGB data using the data stored in the RGB registers Base_R, Base_G and Base_B, the lower 2 bits of the third RGB data using the data stored in the first registers O_R, O_G and O_B, the upper 4 bits of the fourth RGB data using the data stored in the registers Base_R, Base_G, and Base_B, in which the previous first and second RGB data are stored, and the lower 2 bits of the fourth RGB data using the data stored in the second registers E_R, E_G and E_B.
If the flag bit is ‘00’, the scan decoder 120 creates the upper 4 bits of the second RGB data using the data stored in the RGB registers Base_R, Base_G and Base_B, the upper 4 bits of the first RGB data using the data stored in the first and second registers O_R, O_G, O_B, E_R, E_G and E_B, and the lower 2 bits of the first and second RGB data through the selection of one from among ‘00’, ‘01’ and ‘10’ in consideration of the gamma characteristics of a display panel.
The prior art image data processing apparatus requires two pieces of previous data in order to compress the data of two current pixels at the time of encoding. Accordingly, a total of four pieces of data must be stored and processed at the time of encoding and decoding the data, and thus a register and a comparator are required. As a result, the size of the prior art image data processing apparatus increases, and the time required for the processing of data increases because a large amount of data is processed.